From 6fa0d97f663351869797d35ddb504489e223fa7c Mon Sep 17 00:00:00 2001 From: Pierre-Marc Fournier Date: Mon, 19 Apr 2010 18:35:44 -0400 Subject: [PATCH] Port to PowerPC 32 --- configure.ac | 4 +-- include/ust/kernelcompat.h | 17 +------------ include/ust/marker.h | 6 ++--- include/ust/processor.h | 52 ++++++++++++++++++++++++++++++++++---- 4 files changed, 53 insertions(+), 26 deletions(-) diff --git a/configure.ac b/configure.ac index 689f891..0904c26 100644 --- a/configure.ac +++ b/configure.ac @@ -94,11 +94,11 @@ changequote([,])dnl fi ;; x86_64) LIBFORMAT="elf64-x86-64" ;; - ppc) LIBFORMAT="elf32-powerpc" ;; + powerpc) LIBFORMAT="elf32-powerpc" ;; ppc64) LIBFORMAT="elf64-powerpc" ;; s390) LIBFORMAT="elf32-s390" ;; s390x) LIBFORMAT="elf64-s390" ;; - *) AC_MSG_ERROR([unable to detect library format (unsupported architecture?)]) ;; + *) AC_MSG_ERROR([unable to detect library format (unsupported architecture ($host_cpu)?)]) ;; esac AC_SUBST(LIBFORMAT) AC_MSG_RESULT($LIBFORMAT) diff --git a/include/ust/kernelcompat.h b/include/ust/kernelcompat.h index e6885f7..1b9058d 100644 --- a/include/ust/kernelcompat.h +++ b/include/ust/kernelcompat.h @@ -87,6 +87,7 @@ static inline long IS_ERR(const void *ptr) /* MATH */ +#include static inline unsigned int hweight32(unsigned int w) { unsigned int res = w - ((w >> 1) & 0x55555555); @@ -96,22 +97,6 @@ static inline unsigned int hweight32(unsigned int w) return (res + (res >> 16)) & 0x000000FF; } -static inline int fls(int x) -{ - int r; -//ust// #ifdef CONFIG_X86_CMOV - asm("bsrl %1,%0\n\t" - "cmovzl %2,%0" - : "=&r" (r) : "rm" (x), "rm" (-1)); -//ust// #else -//ust// asm("bsrl %1,%0\n\t" -//ust// "jnz 1f\n\t" -//ust// "movl $-1,%0\n" -//ust// "1:" : "=r" (r) : "rm" (x)); -//ust// #endif - return r + 1; -} - static __inline__ int get_count_order(unsigned int count) { int order; diff --git a/include/ust/marker.h b/include/ust/marker.h index bd1ef69..5590098 100644 --- a/include/ust/marker.h +++ b/include/ust/marker.h @@ -112,7 +112,7 @@ struct marker { ); \ asm volatile ( \ ".section __markers,\"aw\",@progbits\n\t" \ - ".align 8\n\t" \ + ".balign 8\n\t" \ "2:\n\t" \ _ASM_PTR "(__mstrtab_" XSTR(channel) "_" XSTR(name) "_channel_" XSTR(unique) ")\n\t" /* channel string */ \ _ASM_PTR "(__mstrtab_" XSTR(channel) "_" XSTR(name) "_name_" XSTR(unique) ")\n\t" /* name string */ \ @@ -121,7 +121,7 @@ struct marker { ".byte 0\n\t" /* ptype */ \ ".word 0\n\t" /* channel_id */ \ ".word 0\n\t" /* event_id */ \ - ".align " XSTR(__WORDSIZE) " / 8\n\t" /* alignment */ \ + ".balign " XSTR(__WORDSIZE) " / 8\n\t" /* alignment */ \ _ASM_PTR "(marker_probe_cb)\n\t" /* call */ \ _ASM_PTR "(__mark_empty_function)\n\t" /* marker_probe_closure single.field1 */ \ _ASM_PTR "0\n\t" /* marker_probe_closure single.field2 */ \ @@ -130,8 +130,8 @@ struct marker { _ASM_PTR "0\n\t" /* tp_cb */ \ _ASM_PTR "(1f)\n\t" /* location */ \ ".previous\n\t" \ + ARCH_COPY_ADDR("%[outptr]") \ "1:\n\t" \ - ARCH_COPY_ADDR("2b", "%[outptr]") "\n\t" \ : [outptr] "=r" (m) ); \ \ save_registers(®s) diff --git a/include/ust/processor.h b/include/ust/processor.h index db39ee8..867b140 100644 --- a/include/ust/processor.h +++ b/include/ust/processor.h @@ -24,7 +24,7 @@ extern __thread long ust_reg_stack[500]; extern volatile __thread long *ust_reg_stack_ptr; -#ifndef __x86_64 +#ifdef __i386 struct registers { short ss; @@ -40,6 +40,15 @@ struct registers { long esp; }; +static inline int fls(int x) +{ + int r; + asm("bsrl %1,%0\n\t" + "cmovzl %2,%0" + : "=&r" (r) : "rm" (x), "rm" (-1)); + return r + 1; +} + #ifdef CONFIG_UST_GDB_INTEGRATION /* save_registers - saves most of the processor's registers so @@ -198,11 +207,13 @@ struct registers { #define RELATIVE_ADDRESS(__rel_label__) __rel_label__ -#define ARCH_COPY_ADDR(src, dst) "lea " src "," dst +#define ARCH_COPY_ADDR(dst) "lea 2b," dst "\n\t" #define _ASM_PTR ".long " -#else /* below is code for x86-64 */ +#endif /* below is code for x86-64 */ + +#ifdef __x86_64 struct registers { int padding; /* 4 bytes */ @@ -227,6 +238,15 @@ struct registers { unsigned long rsp; }; +static inline int fls(int x) +{ + int r; + asm("bsrl %1,%0\n\t" + "cmovzl %2,%0" + : "=&r" (r) : "rm" (x), "rm" (-1)); + return r + 1; +} + #ifdef CONFIG_UST_GDB_INTEGRATION #define save_registers(regsptr) \ @@ -398,10 +418,32 @@ struct registers { * in a relocatable way. On x86-64, this uses a special (%rip) notation. */ #define RELATIVE_ADDRESS(__rel_label__) __rel_label__(%%rip) -#define ARCH_COPY_ADDR(src, dst) "lea " src "(%%rip)," dst +#define ARCH_COPY_ADDR(dst) "lea 2b(%%rip)," dst "\n\t" #define _ASM_PTR ".quad " -#endif +#endif /* x86_64 */ + +#ifdef __PPC__ + +struct registers { +}; + +static __inline__ int fls(unsigned int x) +{ + int lz; + + asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); + return 32 - lz; +} + +#define ARCH_COPY_ADDR(dst) \ + "lis " dst ",2b@h\n\t" /* load high bytes */ \ + "ori " dst "," dst ",2b@l\n\t" /* load low bytes */ + +#define _ASM_PTR ".long " +#define save_registers(a) + +#endif /* __PPC__ */ #endif /* UST_PROCESSOR_H */ -- 2.34.1