Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
#define cpu_relax() barrier()
#endif
-#ifndef sync_core
-#define sync_core() mb()
-#endif
-
#ifdef __cplusplus
}
#endif
#define mb() asm volatile("sync":::"memory")
-/*
- * Serialize core instruction execution. Also acts as a compiler barrier.
- */
-#define sync_core() asm volatile("isync" : : : "memory")
-
#define mftbl() \
({ \
unsigned long rval; \
#define cpu_relax() asm volatile("rep; nop" : : : "memory");
-/*
- * Serialize core instruction execution. Also acts as a compiler barrier.
- * On PIC ebx cannot be clobbered
- */
-#ifdef __PIC__
-#define sync_core() \
- asm volatile("push %%ebx; cpuid; pop %%ebx" \
- : : : "memory", "eax", "ecx", "edx");
-#endif
-#ifndef __PIC__
-#define sync_core() \
- asm volatile("cpuid" : : : "memory", "eax", "ebx", "ecx", "edx");
-#endif
-
#define rdtscll(val) \
do { \
unsigned int __a, __d; \