urcu: Add extra "engineering safety factor" memory barrier in update_counter_and_wait()

Even though the memory barriers within update_counter_and_wait() are proven not
to be needed in urcu-mb/signal/qsbr implementations, we leave them in place as
an engineering safety factor. Basically, we've proven they are not required
(formally for urcu-mb and urcu-signal by model checking, less formally for
urcu-qsbr by looking at the execution order of concurrent synchronize_rcu() and
RCU read-sides with out-of-order load/stores). However, given that on the
overall performance impact of synchronize_rcu(), these memory barriers do not
add a significant overhead, let's leave them in place with a comment stating
that they are not required.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

diff --git a/urcu-qsbr.c b/urcu-qsbr.c
index 25074d09063a60ae5c94a17b18cd9d241b1e2fb9..c678d38779eb683f1f78872a87e853a4c281f43d 100644 (file)
--- a/urcu-qsbr.c
+++ b/urcu-qsbr.c
@@ -124,8 +124,12 @@ static void update_counter_and_wait(void)
         * Enforce compiler-order of store to rcu_gp_ctr before before
         * load rcu_reader ctr.
         * This ensures synchronize_rcu() cannot be starved by readers.
+        *
+        * Adding a smp_mb() which is _not_ formally required, but makes the
+        * model easier to understand. It does not have a big performance impact
+        * anyway, given this is the write-side.
         */
-       barrier();
+       smp_mb();
 
        /*
         * Wait for each thread rcu_reader_qs_gp count to become 0.

diff --git a/urcu.c b/urcu.c
index b8567555d09ecbb22547aa6f236392d439eea871..bb6629c718086a9800a22a4d3ab21685b27c26a5 100644 (file)
--- a/urcu.c
+++ b/urcu.c
@@ -215,6 +215,10 @@ void update_counter_and_wait(void)
         */
 
        /*
+        * Enforce compiler-order of store to rcu_gp_ctr before before
+        * load rcu_reader ctr.
+        * This ensures synchronize_rcu() cannot be starved by readers.
+        *
         * Adding a smp_mb() which is _not_ formally required, but makes the
         * model easier to understand. It does not have a big performance impact
         * anyway, given this is the write-side.