update compat

git-svn-id: http://ltt.polymtl.ca/svn@2419 04897980-b3bd-0310-b5e0-8ef037075253

diff --git a/ltt/branches/poly/doc/developer/lttng-lttv-compatibility.html b/ltt/branches/poly/doc/developer/lttng-lttv-compatibility.html
index b1b7d2d0091b21f3de759dba98598db45e548d82..3b9e64a0def7eeda733763c21ce83edcca5a23e5 100644 (file)
--- a/ltt/branches/poly/doc/developer/lttng-lttv-compatibility.html
+++ b/ltt/branches/poly/doc/developer/lttng-lttv-compatibility.html
@@ -1944,6 +1944,7 @@ Use cpuid instruction in pIII XMC.<br>
 </td>
 <td style="vertical-align: top;">
 0.34<br>
+0.35<br>
 <td style="vertical-align: top;">
 obsolete<br>
 </td>
@@ -1985,6 +1986,7 @@ regression on sparc.<br>
 LTTng 0.6.72 fixes regression on alpha.<br>
 ltt-usertrace 0.27 fixes a signal race.<br>
 LTTng 0.6.77 puts all process events in medium rate process channel.<br>
+ltt-control 0.35 adds the Xen facility.<br>
 <td style="vertical-align: top;">
 ARM, mips, mipsel, powerpc64, i386, sparc64, m68k, ia64, s390, sparc, alpha.<br>
 </td>

diff --git a/ltt/branches/poly/doc/developer/tsc-smallv2.txt b/ltt/branches/poly/doc/developer/tsc-smallv2.txt
index e21cb9eee939fa5e4a12f4e0d0bf9f0dff11f8bc..d65cfed3bfd332dfd907acc5b7afb11b991fa897 100644 (file)
--- a/ltt/branches/poly/doc/developer/tsc-smallv2.txt
+++ b/ltt/branches/poly/doc/developer/tsc-smallv2.txt
@@ -122,7 +122,8 @@ Granularity : 800ns (200 cycles@4GHz) : 2^9 = 512 (remove 9 LSB)
 Min wrap : 100HZ system, each 3 timer ticks : 0.03s (32-4 MSB for 4 GHZ : 0.26s)
   (heartbeat each 100HZ, to be safe)
   Number of MSB to skip :
-    32 - find_first_bit(( (expected_longest_interrupt_latency()[ms] + max_timer_interval[ms]) / cpu_khz )) - 1
+    32 - find_first_bit(( (expected_longest_interrupt_latency()[ms] +
+       max_timer_interval[ms]) * cpu_khz[kcycles/s] )) - 1
     (the last -1 is to make sure we remove less or exact amount of bits, round
     near to 0, not round up).