ARM32: use dmb ish (inner shareable domain) for smp barriers

Based on https://gcc.gnu.org/ml/gcc-patches/2014-11/msg01272.html:

From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>:

"Hans Boehm pointed out that we were using dmb sy instead of dmb ish.
Given that the ARM-ARM says that the inner shareability domain is really
the one that contains all PE's controlled by a single hypervisor or
operating system, it would be safe to replace all dmb sy's with dmb
ish's. "

Keep full system barriers for cmm_mb()/cmm_rmb()/cmm_wmb().

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>

diff --git a/include/urcu/arch/arm.h b/include/urcu/arch/arm.h
index 5cbca7d7f1d0d523186b40837ce93ff515615128..cb8f28dc711769f2c91544b598be95c64bc83294 100644 (file)
--- a/include/urcu/arch/arm.h
+++ b/include/urcu/arch/arm.h
@@ -31,9 +31,19 @@ extern "C" {
 #endif
 
 #ifdef CONFIG_RCU_ARM_HAVE_DMB
-#define cmm_mb()       __asm__ __volatile__ ("dmb":::"memory")
-#define cmm_rmb()      __asm__ __volatile__ ("dmb":::"memory")
-#define cmm_wmb()      __asm__ __volatile__ ("dmb":::"memory")
+/*
+ * Issues full system DMB operation.
+ */
+#define cmm_mb()       __asm__ __volatile__ ("dmb sy":::"memory")
+#define cmm_rmb()      __asm__ __volatile__ ("dmb sy":::"memory")
+#define cmm_wmb()      __asm__ __volatile__ ("dmb sy":::"memory")
+
+/*
+ * Issues DMB operation only to the inner shareable domain.
+ */
+#define cmm_smp_mb()   __asm__ __volatile__ ("dmb ish":::"memory")
+#define cmm_smp_rmb()  __asm__ __volatile__ ("dmb ish":::"memory")
+#define cmm_smp_wmb()  __asm__ __volatile__ ("dmb ish":::"memory")
 #endif /* CONFIG_RCU_ARM_HAVE_DMB */
 
 #include <stdlib.h>