ring buffer: Use cpu_dcache_is_aliasing()
authorMathieu Desnoyers <mathieu.desnoyers@efficios.com>
Thu, 11 Apr 2024 20:09:26 +0000 (16:09 -0400)
committerMathieu Desnoyers <mathieu.desnoyers@efficios.com>
Thu, 11 Apr 2024 20:09:26 +0000 (16:09 -0400)
Upstream Linux commit 8690bbcf3b7 ("Introduce cpu_dcache_is_aliasing()
across all architectures") allows checking whether the architecture has
aliasing data caches more accurately. This will be present in upstream
Linux v6.9 (currently in v6.9-rc3).

I expect this to improve the ring buffer performance on ARM64 and
32-bit ARM with non-aliasing data caches.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Change-Id: I3e29966b8c8cab098d57437a11f1f94c53a9e186

src/lib/ringbuffer/ring_buffer_frontend.c

index 5316b7ff407196115726c2e33530978e17111b08..fbf3a16837c8574ebf6b90a2986d804626ba2d97 100644 (file)
@@ -1210,6 +1210,16 @@ static void lib_ring_buffer_flush_read_subbuf_dcache(
        if (config->output != RING_BUFFER_MMAP)
                return;
 
+#ifdef cpu_dcache_is_aliasing
+       /*
+        * Some architectures implement flush_dcache_page() but don't
+        * actually have aliasing dcache. cpu_dcache_is_aliasing() was
+        * introduced in kernel v6.9 to query this more precisely.
+        */
+       if (!cpu_dcache_is_aliasing())
+               return;
+#endif
+
        /*
         * Architectures with caches aliased on virtual addresses may
         * use different cache lines for the linear mapping vs
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