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(parent: e4d1eb0) | patch
define sync_core for x86 PIC
authorPaolo Bonzini <pbonzini@redhat.com>
Mon, 1 Mar 2010 18:52:45 +0000 (13:52 -0500)
committerMathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Mon, 1 Mar 2010 18:52:45 +0000 (13:52 -0500)
commitdac93f5961f305a3bd08cd82f649a7a4dcf6e3eb
tree0021f9fd710366526b61213dd44ea29351b36d03tree | snapshot
parente4d1eb09301904b56cdf22e1d6042df4492d57cbcommit | diff
define sync_core for x86 PIC

Pushing/popping the reserved ebx register is surely less expensive
than a memory barrier.

Note that since ebx is a callee-save register, this is even safe for
signals (i.e. it would be safe even if we needed the value that cpuid
puts in %%ebx).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
urcu/arch_x86.h diff | blob | blame | history
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