X-Git-Url: http://git.lttng.org./?a=blobdiff_plain;f=markers-test%2Ftest-mark-speed-empty.c;h=e9ea607b85e09cde3c38517d3752e59a2e404d5a;hb=58310ebf4ad6a55b26cfc10950208f7d83c584f2;hp=943af27dfe5cbab1d7265da224766b5614f02aec;hpb=8dd5f9aaad6a4d587a67500eca0449ec69b7d7bd;p=lttv.git diff --git a/markers-test/test-mark-speed-empty.c b/markers-test/test-mark-speed-empty.c index 943af27d..e9ea607b 100644 --- a/markers-test/test-mark-speed-empty.c +++ b/markers-test/test-mark-speed-empty.c @@ -8,6 +8,31 @@ #include #include #include +#include + +static void pmc_flush_cache(void) + { + register int i; + /* write back and invalidate cache (a serializing instruction) */ + + __asm__ __volatile__ ( "wbinvd" : : : "memory" ); + + /* The wbinvd instruction does not wait for the external caches + * to be flushed, but only requests that it be done. The loop + * is to be sure that enough time has elapsed, but the compiler + * might simplify or even remove it. The loop bound is for a + * 512 KB L2 cache. On a Pentium Pro/II/III, the loop uses + * 2 cycles per iteration. + * + * Does wbinvd also cause the TLB to be flushed? + * A comment in mtrr.c suggests that it does. + */ + for (i = 0; i < 512*1024; i++) { + cpu_relax(); + } + } + + static void noinline test2(const struct marker *mdata, void *call_private, ...) { @@ -52,7 +77,18 @@ struct proc_dir_entry *pentry = NULL; static inline void test(unsigned long arg, unsigned long arg2) { - asm volatile (""); + volatile int temp[5]; +#ifdef CACHEFLUSH + clflush(¤t->pid); + //pmc_flush_cache(); +#endif + temp[2] = (temp[0] + 60) << 10; + temp[3] = (temp[2] + 60) << 10; + temp[4] = (temp[3] + 60) << 10; + temp[0] = (temp[4] + 60) << 10; + barrier(); + asm (""); + barrier(); //__my_trace_mark(1, kernel_debug_test, NULL, "%d %d %ld %ld", 2, current->pid, arg, arg2); //__my_trace_mark(0, kernel_debug_test, NULL, "%d %d %ld %ld", 2, current->pid, arg, arg2); } @@ -64,10 +100,23 @@ static int my_open(struct inode *inode, struct file *file) unsigned long flags; local_irq_save(flags); +#ifdef CACHEFLUSH + //pmc_flush_cache(); /* initial write back, without cycle count */ + //msleep(20); /* wait for L2 flush */ +#endif rdtsc_barrier(); cycles1 = get_cycles(); rdtsc_barrier(); - for(i=0; i<20000; i++) { + for(i=0; i<2000; i++) { + test(i, i); + test(i, i); + test(i, i); + test(i, i); + test(i, i); + test(i, i); + test(i, i); + test(i, i); + test(i, i); test(i, i); } rdtsc_barrier(); @@ -100,4 +149,5 @@ void cleanup_module(void) MODULE_LICENSE("GPL"); MODULE_AUTHOR("Mathieu Desnoyers"); MODULE_DESCRIPTION("Marker Test"); +MODULE_VERSION("1.0");