1 #ifndef _URCU_ARCH_X86_H
2 #define _URCU_ARCH_X86_H
5 * arch_x86.h: trivial definitions for the x86 architecture.
7 * Copyright (c) 2009 Paul E. McKenney, IBM Corporation.
8 * Copyright (c) 2009 Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
10 * This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU Lesser General Public
12 * License as published by the Free Software Foundation; either
13 * version 2.1 of the License, or (at your option) any later version.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
25 #include <urcu/compiler.h>
26 #include <urcu/config.h>
32 #define CAA_CACHE_LINE_SIZE 128
34 #ifdef CONFIG_RCU_HAVE_FENCE
35 #define cmm_mb() asm volatile("mfence":::"memory")
36 #define cmm_rmb() asm volatile("lfence":::"memory")
37 #define cmm_wmb() asm volatile("sfence"::: "memory")
40 * Some non-Intel clones support out of order store. cmm_wmb() ceases to be a
43 #define cmm_mb() asm volatile("lock; addl $0,0(%%esp)":::"memory")
44 #define cmm_rmb() asm volatile("lock; addl $0,0(%%esp)":::"memory")
45 #define cmm_wmb() asm volatile("lock; addl $0,0(%%esp)"::: "memory")
48 #define caa_cpu_relax() asm volatile("rep; nop" : : : "memory");
50 #define rdtscll(val) \
52 unsigned int __a, __d; \
53 asm volatile("rdtsc" : "=a" (__a), "=d" (__d)); \
54 (val) = ((unsigned long long)__a) \
55 | (((unsigned long long)__d) << 32); \
58 typedef unsigned long long cycles_t
;
60 static inline cycles_t
caa_get_cycles(void)
72 #include <urcu/arch/generic.h>
74 #endif /* _URCU_ARCH_X86_H */
This page took 0.031543 seconds and 4 git commands to generate.