2 * include/asm-ppc/ppc_asm.h
4 * Definitions used by various bits of low-level assembly code on PowerPC.
6 * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
15 * Macros for storing registers into and loading registers from
18 #define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base)
19 #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
20 #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
21 #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
22 #define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
23 #define REST_GPR(n, base) lwz n,GPR0+4*(n)(base)
24 #define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
25 #define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
26 #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
27 #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
29 #define SAVE_NVGPRS(base) SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
31 #define REST_NVGPRS(base) REST_GPR(13, base); REST_8GPRS(14, base); \
34 #define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base)
35 #define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
36 #define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
37 #define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
38 #define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
39 #define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
40 #define REST_FPR(n, base) lfd n,THREAD_FPR0+8*(n)(base)
41 #define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base)
42 #define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base)
43 #define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base)
44 #define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base)
45 #define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base)
47 #define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base
48 #define SAVE_2VR(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base)
49 #define SAVE_4VR(n,b,base) SAVE_2VR(n,b,base); SAVE_2VR(n+2,b,base)
50 #define SAVE_8VR(n,b,base) SAVE_4VR(n,b,base); SAVE_4VR(n+4,b,base)
51 #define SAVE_16VR(n,b,base) SAVE_8VR(n,b,base); SAVE_8VR(n+8,b,base)
52 #define SAVE_32VR(n,b,base) SAVE_16VR(n,b,base); SAVE_16VR(n+16,b,base)
53 #define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base
54 #define REST_2VR(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base)
55 #define REST_4VR(n,b,base) REST_2VR(n,b,base); REST_2VR(n+2,b,base)
56 #define REST_8VR(n,b,base) REST_4VR(n,b,base); REST_4VR(n+4,b,base)
57 #define REST_16VR(n,b,base) REST_8VR(n,b,base); REST_8VR(n+8,b,base)
58 #define REST_32VR(n,b,base) REST_16VR(n,b,base); REST_16VR(n+16,b,base)
60 #define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
61 #define SAVE_2EVR(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
62 #define SAVE_4EVR(n,s,base) SAVE_2EVR(n,s,base); SAVE_2EVR(n+2,s,base)
63 #define SAVE_8EVR(n,s,base) SAVE_4EVR(n,s,base); SAVE_4EVR(n+4,s,base)
64 #define SAVE_16EVR(n,s,base) SAVE_8EVR(n,s,base); SAVE_8EVR(n+8,s,base)
65 #define SAVE_32EVR(n,s,base) SAVE_16EVR(n,s,base); SAVE_16EVR(n+16,s,base)
67 #define REST_EVR(n,s,base) lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n
68 #define REST_2EVR(n,s,base) REST_EVR(n,s,base); REST_EVR(n+1,s,base)
69 #define REST_4EVR(n,s,base) REST_2EVR(n,s,base); REST_2EVR(n+2,s,base)
70 #define REST_8EVR(n,s,base) REST_4EVR(n,s,base); REST_4EVR(n+4,s,base)
71 #define REST_16EVR(n,s,base) REST_8EVR(n,s,base); REST_8EVR(n+8,s,base)
72 #define REST_32EVR(n,s,base) REST_16EVR(n,s,base); REST_16EVR(n+16,s,base)
74 #ifdef CONFIG_PPC601_SYNC_FIX
79 END_FTR_SECTION_IFSET(CPU_FTR_601)
83 END_FTR_SECTION_IFSET(CPU_FTR_601)
87 END_FTR_SECTION_IFSET(CPU_FTR_601)
96 #else /* CONFIG_SMP */
97 /* tlbsync is not implemented on 601 */
102 END_FTR_SECTION_IFCLR(CPU_FTR_601)
106 * This instruction is not implemented on the PPC 603 or 601; however, on
107 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
108 * All of these instructions exist in the 8xx, they have magical powers,
109 * and they must be used.
112 #if !defined(CONFIG_4xx) && !defined(CONFIG_8xx)
116 lis r4,KERNELBASE@h; \
123 #define tophys(rd,rs) \
126 #define tovirt(rd,rs) \
129 #else /* CONFIG_BOOKE */
131 * On APUS (Amiga PowerPC cpu upgrade board), we don't know the
132 * physical base address of RAM at compile time.
134 #define tophys(rd,rs) \
135 0: addis rd,rs,-KERNELBASE@h; \
136 .section ".vtop_fixup","aw"; \
141 #define tovirt(rd,rs) \
142 0: addis rd,rs,KERNELBASE@h; \
143 .section ".ptov_fixup","aw"; \
147 #endif /* CONFIG_BOOKE */
150 * On 64-bit cpus, we use the rfid instruction instead of rfi, but
151 * we then have to make sure we preserve the top 32 bits except for
152 * the 64-bit mode bit, which we clear.
154 #ifdef CONFIG_PPC64BRIDGE
155 #define FIX_SRR1(ra, rb) \
158 clrldi ra,ra,1; /* turn off 64-bit mode */ \
160 #define RFI .long 0x4c000024 /* rfid instruction */
161 #define MTMSRD(r) .long (0x7c000164 + ((r) << 21)) /* mtmsrd */
162 #define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */
165 #define FIX_SRR1(ra, rb)
169 #define RFI rfi; b . /* Prevent prefetch past rfi */
171 #define MTMSRD(r) mtmsr r
173 #endif /* CONFIG_PPC64BRIDGE */
175 #define RFCI .long 0x4c000066 /* rfci instruction */
176 #define RFDI .long 0x4c00004e /* rfdi instruction */
177 #define RFMCI .long 0x4c00004c /* rfmci instruction */
179 #ifdef CONFIG_IBM405_ERR77
180 #define PPC405_ERR77(ra,rb) dcbt ra, rb;
181 #define PPC405_ERR77_SYNC sync;
183 #define PPC405_ERR77(ra,rb)
184 #define PPC405_ERR77_SYNC
187 /* The boring bits... */
189 /* Condition Register Bit Fields */
201 /* General Purpose Registers (GPRs) */
237 /* Floating Point Registers (FPRs) */
338 /* some stab codes */
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