2 * PowerPC atomic operations
5 #ifndef _ASM_PPC_ATOMIC_H_
6 #define _ASM_PPC_ATOMIC_H_
12 typedef struct { volatile int counter
; } atomic_t
;
14 #define ATOMIC_INIT(i) { (i) }
16 #define atomic_read(v) ((v)->counter)
17 #define atomic_set(v,i) (((v)->counter) = (i))
19 extern void atomic_clear_mask(unsigned long mask
, unsigned long *addr
);
21 #if 0 // We only do operation on one CPU at a time (LTT)
22 #define SMP_SYNC "sync"
23 #define SMP_ISYNC "\n\tisync"
29 /* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx.
30 * The old ATOMIC_SYNC_FIX covered some but not all of this.
32 #ifdef CONFIG_IBM405_ERR77
33 #define PPC405_ERR77(ra,rb) "dcbt " #ra "," #rb ";"
35 #define PPC405_ERR77(ra,rb)
38 static __inline__
void atomic_add(int a
, atomic_t
*v
)
43 "1: lwarx %0,0,%3 # atomic_add\n\
48 : "=&r" (t
), "=m" (v
->counter
)
49 : "r" (a
), "r" (&v
->counter
), "m" (v
->counter
)
53 static __inline__
int atomic_add_return(int a
, atomic_t
*v
)
58 "1: lwarx %0,0,%2 # atomic_add_return\n\
65 : "r" (a
), "r" (&v
->counter
)
71 #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
73 static __inline__
void atomic_sub(int a
, atomic_t
*v
)
78 "1: lwarx %0,0,%3 # atomic_sub\n\
83 : "=&r" (t
), "=m" (v
->counter
)
84 : "r" (a
), "r" (&v
->counter
), "m" (v
->counter
)
88 static __inline__
int atomic_sub_return(int a
, atomic_t
*v
)
93 "1: lwarx %0,0,%2 # atomic_sub_return\n\
100 : "r" (a
), "r" (&v
->counter
)
106 static __inline__
void atomic_inc(atomic_t
*v
)
110 __asm__
__volatile__(
111 "1: lwarx %0,0,%2 # atomic_inc\n\
116 : "=&r" (t
), "=m" (v
->counter
)
117 : "r" (&v
->counter
), "m" (v
->counter
)
121 static __inline__
int atomic_inc_return(atomic_t
*v
)
125 __asm__
__volatile__(
126 "1: lwarx %0,0,%1 # atomic_inc_return\n\
140 * atomic_inc_and_test - increment and test
141 * @v: pointer of type atomic_t
143 * Atomically increments @v by 1
144 * and returns true if the result is zero, or false for all
147 #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
149 static __inline__
void atomic_dec(atomic_t
*v
)
153 __asm__
__volatile__(
154 "1: lwarx %0,0,%2 # atomic_dec\n\
159 : "=&r" (t
), "=m" (v
->counter
)
160 : "r" (&v
->counter
), "m" (v
->counter
)
164 static __inline__
int atomic_dec_return(atomic_t
*v
)
168 __asm__
__volatile__(
169 "1: lwarx %0,0,%1 # atomic_dec_return\n\
182 #define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
183 #define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
186 * Atomically test *v and decrement if it is greater than 0.
187 * The function returns the old value of *v minus 1.
189 static __inline__
int atomic_dec_if_positive(atomic_t
*v
)
193 __asm__
__volatile__(
194 "1: lwarx %0,0,%1 # atomic_dec_if_positive\n\
209 #define __MB __asm__ __volatile__ (SMP_SYNC : : : "memory")
210 #define smp_mb__before_atomic_dec() __MB
211 #define smp_mb__after_atomic_dec() __MB
212 #define smp_mb__before_atomic_inc() __MB
213 #define smp_mb__after_atomic_inc() __MB
216 } /* end of extern "C" */
219 #endif /* _ASM_PPC_ATOMIC_H_ */
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