2 * mem.spin: Promela code to validate memory barriers with out-of-order memory
3 * and out-of-order instruction scheduling.
11 * alpha = 1; x = beta;
13 * beta = 1; y = alpha;
15 * if x = 1, then y will = 1 when it is read.
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 * Copyright (c) 2009 Mathieu Desnoyers
34 /* Promela validation variables. */
37 * Produced process control and data flow. Updated after each instruction to
38 * show which variables are ready. Using one-hot bit encoding per variable to
39 * save state space. Used as triggers to execute the instructions having those
40 * variables as input. Leaving bits active to inhibit instruction execution.
41 * Scheme used to make instruction disabling and automatic dependency fall-back
45 #define CONSUME_TOKENS(state, bits, notbits) \
46 ((!(state & (notbits))) && (state & (bits)) == (bits))
48 #define PRODUCE_TOKENS(state, bits) \
49 state = state | (bits);
51 #define CLEAR_TOKENS(state, bits) \
52 state = state & ~(bits)
56 #define get_pid() (_pid)
59 * Each process have its own data in cache. Caches are randomly updated.
60 * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces
64 #define DECLARE_CACHED_VAR(type, x, v) \
66 type cached_##x[NR_PROCS] = v; \
67 bit cache_dirty_##x[NR_PROCS] = 0;
69 #define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id])
71 #define READ_CACHED_VAR(x) \
72 (cached_##x[get_pid()])
74 #define WRITE_CACHED_VAR(x, v) \
76 cached_##x[get_pid()] = v; \
77 cache_dirty_##x[get_pid()] = 1; \
80 #define CACHE_WRITE_TO_MEM(x, id) \
82 :: IS_CACHE_DIRTY(x, id) -> \
83 mem_##x = cached_##x[id]; \
84 cache_dirty_##x[id] = 0; \
89 #define CACHE_READ_FROM_MEM(x, id) \
91 :: !IS_CACHE_DIRTY(x, id) -> \
92 cached_##x[id] = mem_##x; \
98 * May update other caches if cache is dirty, or not.
100 #define RANDOM_CACHE_WRITE_TO_MEM(x, id) \
102 :: 1 -> CACHE_WRITE_TO_MEM(x, id); \
106 #define RANDOM_CACHE_READ_FROM_MEM(x, id)\
108 :: 1 -> CACHE_READ_FROM_MEM(x, id); \
115 RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid());
116 RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid());
117 RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid());
118 RANDOM_CACHE_READ_FROM_MEM(beta, get_pid());
122 /* must consume all prior read tokens */
126 /* todo : consume all read tokens .. ? */
127 CACHE_READ_FROM_MEM(alpha, get_pid());
128 CACHE_READ_FROM_MEM(beta, get_pid());
132 /* must consume all prior write tokens */
136 CACHE_WRITE_TO_MEM(alpha, get_pid());
137 CACHE_WRITE_TO_MEM(beta, get_pid());
141 /* sync_core() must consume all prior read and write tokens, including rmb/wmb
144 /* must consume all prior read and write tokens */
154 /* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */
155 DECLARE_CACHED_VAR(byte, alpha, 0);
156 DECLARE_CACHED_VAR(byte, beta, 0);
158 /* value 2 is uninitialized */
163 * Bit encoding, proc_one_produced :
166 #define P1_PROD_NONE (1 << 0)
168 #define P1_READ_ONE (1 << 1)
169 #define P1_RMB (1 << 2)
170 #define P1_READ_TWO (1 << 3)
172 /* Only need a single color. */
173 byte proc_one_produced;
175 active proctype test_proc_one()
177 assert(get_pid() < NR_PROCS);
179 PRODUCE_TOKENS(proc_one_produced, P1_PROD_NONE);
181 PRODUCE_TOKENS(proc_one_produced, P1_RMB);
185 :: CONSUME_TOKENS(proc_one_produced,
186 P1_PROD_NONE, P1_READ_ONE) ->
188 read_one = READ_CACHED_VAR(beta);
190 PRODUCE_TOKENS(proc_one_produced, P1_READ_ONE);
191 :: CONSUME_TOKENS(proc_one_produced,
192 P1_READ_ONE, P1_RMB) ->
194 PRODUCE_TOKENS(proc_one_produced, P1_RMB);
195 :: CONSUME_TOKENS(proc_one_produced,
196 P1_RMB, P1_READ_TWO) ->
198 read_two = READ_CACHED_VAR(alpha);
200 PRODUCE_TOKENS(proc_one_produced, P1_READ_TWO);
201 :: CONSUME_TOKENS(proc_one_produced,
202 P1_PROD_NONE | P1_READ_ONE | P1_RMB
207 //CLEAR_TOKENS(proc_one_produced,
208 // P1_PROD_NONE | P1_READ_ONE | P1_RMB | P1_READ_TWO);
210 // test : [] (read_one == 1 -> read_two == 1)
211 assert(read_one != 1 || read_two == 1);
216 * Bit encoding, proc_two_produced :
219 #define P2_PROD_NONE (1 << 0)
221 #define P2_WRITE_ONE (1 << 1)
222 #define P2_WMB (1 << 2)
223 #define P2_WRITE_TWO (1 << 3)
225 /* Only need a single color. */
226 byte proc_two_produced;
228 active proctype test_proc_two()
230 assert(get_pid() < NR_PROCS);
232 PRODUCE_TOKENS(proc_two_produced, P2_PROD_NONE);
234 PRODUCE_TOKENS(proc_two_produced, P2_WMB);
238 :: CONSUME_TOKENS(proc_two_produced,
239 P2_PROD_NONE, P2_WRITE_ONE) ->
241 WRITE_CACHED_VAR(alpha, 1);
243 PRODUCE_TOKENS(proc_two_produced, P2_WRITE_ONE);
244 :: CONSUME_TOKENS(proc_two_produced,
245 P2_WRITE_ONE, P2_WMB) ->
247 PRODUCE_TOKENS(proc_two_produced, P2_WMB);
248 :: CONSUME_TOKENS(proc_two_produced,
249 P2_WMB, P2_WRITE_TWO) ->
251 WRITE_CACHED_VAR(beta, 1);
253 PRODUCE_TOKENS(proc_two_produced, P2_WRITE_TWO);
254 :: CONSUME_TOKENS(proc_two_produced,
255 P2_PROD_NONE | P2_WRITE_ONE
256 | P2_WMB | P2_WRITE_TWO, 0) ->
260 //CLEAR_TOKENS(proc_two_produced,
261 // P2_PROD_NONE | P2_WRITE_ONE | P2_WMB | P2_WRITE_TWO);