| 1 | #ifndef _URCU_H |
| 2 | #define _URCU_H |
| 3 | |
| 4 | /* The "volatile" is due to gcc bugs */ |
| 5 | #define barrier() __asm__ __volatile__("": : :"memory") |
| 6 | |
| 7 | /* x86 32/64 specific */ |
| 8 | #define mb() asm volatile("mfence":::"memory") |
| 9 | #define rmb() asm volatile("lfence":::"memory") |
| 10 | #define wmb() asm volatile("sfence" ::: "memory") |
| 11 | |
| 12 | |
| 13 | |
| 14 | /* x86 32 */ |
| 15 | static inline void atomic_inc(int *v) |
| 16 | { |
| 17 | asm volatile("lock; incl %0" |
| 18 | : "+m" (v->counter)); |
| 19 | } |
| 20 | |
| 21 | /* Nop everywhere except on alpha. */ |
| 22 | #define smp_read_barrier_depends() |
| 23 | |
| 24 | #define SIGURCU SIGUSR1 |
| 25 | |
| 26 | /* Global quiescent period parity */ |
| 27 | extern int urcu_qparity; |
| 28 | |
| 29 | extern int __thread urcu_active_readers[2]; |
| 30 | |
| 31 | static inline int get_urcu_qparity(void) |
| 32 | { |
| 33 | return urcu_qparity; |
| 34 | } |
| 35 | |
| 36 | /* |
| 37 | * returns urcu_parity. |
| 38 | */ |
| 39 | static inline int rcu_read_lock(void) |
| 40 | { |
| 41 | int urcu_parity = get_urcu_qparity(); |
| 42 | urcu_active_readers[urcu_parity]++; |
| 43 | /* |
| 44 | * Increment active readers count before accessing the pointer. |
| 45 | * See force_mb_all_threads(). |
| 46 | */ |
| 47 | barrier(); |
| 48 | return urcu_parity; |
| 49 | } |
| 50 | |
| 51 | static inline void rcu_read_unlock(int urcu_parity) |
| 52 | { |
| 53 | barrier(); |
| 54 | /* |
| 55 | * Finish using rcu before decrementing the pointer. |
| 56 | * See force_mb_all_threads(). |
| 57 | */ |
| 58 | urcu_active_readers[urcu_parity]--; |
| 59 | } |
| 60 | |
| 61 | extern void *urcu_publish_content(void **ptr, void *new); |
| 62 | |
| 63 | /* |
| 64 | * Reader thread registration. |
| 65 | */ |
| 66 | extern void urcu_register_thread(void); |
| 67 | extern void urcu_register_thread(void); |
| 68 | |
| 69 | #endif /* _URCU_H */ |