| 1 | #ifndef _URCU_UATOMIC_ARCH_S390_H |
| 2 | #define _URCU_UATOMIC_ARCH_S390_H |
| 3 | |
| 4 | /* |
| 5 | * Atomic exchange operations for the S390 architecture. Based on information |
| 6 | * taken from the Principles of Operation Appendix A "Conditional Swapping |
| 7 | * Instructions (CS, CDS)". |
| 8 | * |
| 9 | * Copyright (c) 2009 Novell, Inc. |
| 10 | * Author: Jan Blunck <jblunck@suse.de> |
| 11 | * Copyright (c) 2009 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> |
| 12 | * |
| 13 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 14 | * of this software and associated documentation files (the "Software"), to |
| 15 | * deal in the Software without restriction, including without limitation the |
| 16 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 17 | * sell copies of the Software, and to permit persons to whom the Software is |
| 18 | * furnished to do so, subject to the following conditions: |
| 19 | * |
| 20 | * The above copyright notice and this permission notice shall be included in |
| 21 | * all copies or substantial portions of the Software. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 24 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 25 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 26 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 27 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 28 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 29 | * IN THE SOFTWARE. |
| 30 | */ |
| 31 | |
| 32 | #include <urcu/compiler.h> |
| 33 | #include <urcu/system.h> |
| 34 | |
| 35 | #ifndef __SIZEOF_LONG__ |
| 36 | #ifdef __s390x__ |
| 37 | #define __SIZEOF_LONG__ 8 |
| 38 | #else |
| 39 | #define __SIZEOF_LONG__ 4 |
| 40 | #endif |
| 41 | #endif |
| 42 | |
| 43 | #ifndef BITS_PER_LONG |
| 44 | #define BITS_PER_LONG (__SIZEOF_LONG__ * 8) |
| 45 | #endif |
| 46 | |
| 47 | #define uatomic_set(addr, v) STORE_SHARED(*(addr), (v)) |
| 48 | #define uatomic_read(addr) LOAD_SHARED(*(addr)) |
| 49 | |
| 50 | /* xchg */ |
| 51 | unsigned long _uatomic_exchange(volatile void *addr, unsigned long val, int len) |
| 52 | { |
| 53 | switch (len) { |
| 54 | case 4: |
| 55 | { |
| 56 | unsigned int old_val; |
| 57 | |
| 58 | __asm__ __volatile__( |
| 59 | "0: cs %0,%2,%1\n" |
| 60 | " brc 4,0b\n" |
| 61 | : "=&r"(old_val), "=m" (*addr) |
| 62 | : "r"(val), "m" (*addr) |
| 63 | : "memory", "cc"); |
| 64 | } |
| 65 | #if (BITS_PER_LONG == 64) |
| 66 | case 8: |
| 67 | { |
| 68 | unsigned long old_val; |
| 69 | |
| 70 | __asm__ __volatile__( |
| 71 | "0: csg %0,%2,%1\n" |
| 72 | " brc 4,0b\n" |
| 73 | : "=&r"(old_val), "=m" (*addr) |
| 74 | : "r"(val), "m" (*addr) |
| 75 | : "memory", "cc"); |
| 76 | } |
| 77 | #endif |
| 78 | default: |
| 79 | __asm__ __volatile__(".long 0xd00d00"); |
| 80 | } |
| 81 | |
| 82 | return 0; |
| 83 | } |
| 84 | |
| 85 | #define uatomic_xchg(addr, v) \ |
| 86 | (__typeof__(*(addr))) _uatomic_exchange((addr), (unsigned long)(v), \ |
| 87 | sizeof(*(addr))) |
| 88 | |
| 89 | /* cmpxchg */ |
| 90 | |
| 91 | static inline __attribute__((always_inline)) |
| 92 | unsigned long _uatomic_cmpxchg(void *addr, unsigned long old, |
| 93 | unsigned long new, int len) |
| 94 | { |
| 95 | switch (len) { |
| 96 | case 4: |
| 97 | { |
| 98 | unsigned int old_val = (unsigned int)old; |
| 99 | |
| 100 | __asm__ __volatile__( |
| 101 | " cs %0,%2,%1\n" |
| 102 | : "+r"(old_val), "+m"(*addr) |
| 103 | : "r"(new) |
| 104 | : "memory", "cc"); |
| 105 | return old_val; |
| 106 | } |
| 107 | #if (BITS_PER_LONG == 64) |
| 108 | case 8: |
| 109 | __asm__ __volatile__( |
| 110 | " csg %0,%2,%1\n" |
| 111 | : "+r"(old), "+m"(*addr) |
| 112 | : "r"(new) |
| 113 | : "memory", "cc"); |
| 114 | return old; |
| 115 | #endif |
| 116 | default: |
| 117 | __asm__ __volatile__(".long 0xd00d00"); |
| 118 | } |
| 119 | |
| 120 | return 0; |
| 121 | } |
| 122 | |
| 123 | #define uatomic_cmpxchg(addr, old, new) \ |
| 124 | (__typeof__(*(addr))) _uatomic_cmpxchg((addr), \ |
| 125 | (unsigned long)(old), \ |
| 126 | (unsigned long)(new), \ |
| 127 | sizeof(*(addr))) |
| 128 | |
| 129 | /* uatomic_add_return */ |
| 130 | |
| 131 | static inline __attribute__((always_inline)) |
| 132 | unsigned long _uatomic_add_return(void *addr, unsigned long val, int len) |
| 133 | { |
| 134 | switch (len) { |
| 135 | case 4: |
| 136 | { |
| 137 | unsigned int old, oldt; |
| 138 | |
| 139 | oldt = uatomic_read((unsigned int *)addr); |
| 140 | do { |
| 141 | old = oldt; |
| 142 | oldt = _uatomic_cmpxchg(addr, old, old + val, 4); |
| 143 | } while (oldt != old); |
| 144 | |
| 145 | return old + val; |
| 146 | } |
| 147 | #if (BITS_PER_LONG == 64) |
| 148 | case 8: |
| 149 | { |
| 150 | unsigned long old, oldt; |
| 151 | |
| 152 | oldt = uatomic_read((unsigned long *)addr); |
| 153 | do { |
| 154 | old = oldt; |
| 155 | oldt = _uatomic_cmpxchg(addr, old, old + val, 8); |
| 156 | } while (oldt != old); |
| 157 | |
| 158 | return old + val; |
| 159 | } |
| 160 | #endif |
| 161 | } |
| 162 | __builtin_trap(); |
| 163 | return 0; |
| 164 | } |
| 165 | |
| 166 | #define uatomic_add_return(addr, v) \ |
| 167 | ((__typeof__(*(addr))) _uatomic_add_return((addr), \ |
| 168 | (unsigned long)(v), \ |
| 169 | sizeof(*(addr)))) |
| 170 | |
| 171 | /* uatomic_sub_return, uatomic_add, uatomic_sub, uatomic_inc, uatomic_dec */ |
| 172 | |
| 173 | #define uatomic_sub_return(addr, v) uatomic_add_return((addr), -(v)) |
| 174 | |
| 175 | #define uatomic_add(addr, v) (void)uatomic_add_return((addr), (v)) |
| 176 | #define uatomic_sub(addr, v) (void)uatomic_sub_return((addr), (v)) |
| 177 | |
| 178 | #define uatomic_inc(addr) uatomic_add((addr), 1) |
| 179 | #define uatomic_dec(addr) uatomic_add((addr), -1) |
| 180 | |
| 181 | #define compat_uatomic_cmpxchg(ptr, old, _new) uatomic_cmpxchg(ptr, old, _new) |
| 182 | |
| 183 | #endif /* _URCU_UATOMIC_ARCH_S390_H */ |