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1 | #ifndef __TIMEX_PPC_H |
2 | #define __TIMEX_PPC_H |
3 | |
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4 | #ifdef __cplusplus |
5 | extern "C" { |
6 | #endif |
7 | |
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8 | #define CPU_FTR_601 0x00000100 |
9 | |
10 | #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ |
11 | |
12 | typedef uint64_t cycles_t; |
13 | |
14 | /* On ppc64 this gets us the whole timebase; on ppc32 just the lower half */ |
15 | static inline unsigned long get_tbl(void) |
16 | { |
17 | unsigned long tbl; |
18 | |
19 | //#if defined(CONFIG_403GCX) |
20 | // asm volatile("mfspr %0, 0x3dd" : "=r" (tbl)); |
21 | //#else |
22 | asm volatile("mftb %0" : "=r" (tbl)); |
23 | //#endif |
24 | return tbl; |
25 | } |
26 | |
27 | static inline unsigned int get_tbu(void) |
28 | { |
29 | unsigned int tbu; |
30 | |
31 | //#if defined(CONFIG_403GCX) |
32 | // asm volatile("mfspr %0, 0x3dc" : "=r" (tbu)); |
33 | //#else |
34 | asm volatile("mftbu %0" : "=r" (tbu)); |
35 | //#endif |
36 | return tbu; |
37 | } |
38 | |
39 | static inline uint64_t get_tb(void) |
40 | { |
41 | unsigned int tbhi, tblo, tbhi2; |
42 | |
43 | do { |
44 | tbhi = get_tbu(); |
45 | tblo = get_tbl(); |
46 | tbhi2 = get_tbu(); |
47 | } while (tbhi != tbhi2); |
48 | |
49 | return ((uint64_t)tbhi << 32) | tblo; |
50 | } |
51 | |
52 | static inline cycles_t get_cycles(void) |
53 | { |
54 | return get_tb(); |
55 | } |
56 | |
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57 | #ifdef __cplusplus |
58 | } /* end of extern "C" */ |
59 | #endif |
60 | |
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61 | #endif //__TIMEX_PPC_H |