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1 | #ifndef __TIMEX_PPC_H |
2 | #define __TIMEX_PPC_H |
3 | |
4 | #define CPU_FTR_601 0x00000100 |
5 | |
6 | #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ |
7 | |
8 | typedef uint64_t cycles_t; |
9 | |
10 | /* On ppc64 this gets us the whole timebase; on ppc32 just the lower half */ |
11 | static inline unsigned long get_tbl(void) |
12 | { |
13 | unsigned long tbl; |
14 | |
15 | //#if defined(CONFIG_403GCX) |
16 | // asm volatile("mfspr %0, 0x3dd" : "=r" (tbl)); |
17 | //#else |
18 | asm volatile("mftb %0" : "=r" (tbl)); |
19 | //#endif |
20 | return tbl; |
21 | } |
22 | |
23 | static inline unsigned int get_tbu(void) |
24 | { |
25 | unsigned int tbu; |
26 | |
27 | //#if defined(CONFIG_403GCX) |
28 | // asm volatile("mfspr %0, 0x3dc" : "=r" (tbu)); |
29 | //#else |
30 | asm volatile("mftbu %0" : "=r" (tbu)); |
31 | //#endif |
32 | return tbu; |
33 | } |
34 | |
35 | static inline uint64_t get_tb(void) |
36 | { |
37 | unsigned int tbhi, tblo, tbhi2; |
38 | |
39 | do { |
40 | tbhi = get_tbu(); |
41 | tblo = get_tbl(); |
42 | tbhi2 = get_tbu(); |
43 | } while (tbhi != tbhi2); |
44 | |
45 | return ((uint64_t)tbhi << 32) | tblo; |
46 | } |
47 | |
48 | static inline cycles_t get_cycles(void) |
49 | { |
50 | return get_tb(); |
51 | } |
52 | |
53 | #endif //__TIMEX_PPC_H |