projects / urcu.git / blame
| Commit | Line | Data |
|---|---|---|
| d3d3857f MJ |
1 | // SPDX-FileCopyrightText: 2018 Michael Jeanson <mjeanson@efficios.com> |
| 2 | // | |
| 3 | // SPDX-License-Identifier: MIT | |
| 4 | ||
| fdfad810 | 5 | /* |
| 46980605 OD |
6 | * Atomic exchange operations for the RISC-V architecture. |
| 7 | * | |
| 8 | * Let the compiler do it. | |
| fdfad810 MJ |
9 | */ |
| 10 | ||
| 4e7b1f99 MD |
11 | #ifndef _URCU_ARCH_UATOMIC_RISCV_H |
| 12 | #define _URCU_ARCH_UATOMIC_RISCV_H | |
| 13 | ||
| 14 | #include <urcu/compiler.h> | |
| 15 | #include <urcu/system.h> | |
| 16 | ||
| 46980605 OD |
17 | /* |
| 18 | * See <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104831> for details. | |
| 19 | * | |
| 9a37bbc7 MJ |
20 | * The following GCC patches are required to have a working Userspace RCU on |
| 21 | * the RISC-V architecture. The were introduced in GCC 14 and backported to | |
| 22 | * 13.3.0. | |
| 46980605 | 23 | * |
| 9a37bbc7 | 24 | * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=dcd7b2f5f7233a04c8b14b362d0befa76e9654c0> |
| 46980605 OD |
25 | * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448> |
| 26 | * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d199d2e56da2379004e7e0457150409c0c99d3e6> | |
| 27 | */ | |
| 4e7b1f99 | 28 | #ifdef URCU_GCC_VERSION |
| 9a37bbc7 MJ |
29 | # if (URCU_GCC_VERSION < 130300) |
| 30 | # error "Implementations of some atomic operations of GCC < 13.3.0 for RISC-V are insufficient for sequential consistency. For this reason Userspace RCU is currently marked as 'broken' for RISC-V on these GCC versions." | |
| 31 | # endif | |
| 46980605 OD |
32 | #endif |
| 33 | ||
| fdfad810 MJ |
34 | #ifdef __cplusplus |
| 35 | extern "C" { | |
| 36 | #endif | |
| 37 | ||
| 38 | #define UATOMIC_HAS_ATOMIC_BYTE | |
| 39 | #define UATOMIC_HAS_ATOMIC_SHORT | |
| 40 | ||
| 41 | #ifdef __cplusplus | |
| 42 | } | |
| 43 | #endif | |
| 44 | ||
| 45 | #include <urcu/uatomic/generic.h> | |
| 46 | ||
| 47 | #endif /* _URCU_ARCH_UATOMIC_RISCV_H */ |