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d3d3857f MJ |
1 | // SPDX-FileCopyrightText: 2018 Michael Jeanson <mjeanson@efficios.com> |
2 | // | |
3 | // SPDX-License-Identifier: MIT | |
4 | ||
fdfad810 | 5 | /* |
46980605 OD |
6 | * Atomic exchange operations for the RISC-V architecture. |
7 | * | |
8 | * Let the compiler do it. | |
fdfad810 MJ |
9 | */ |
10 | ||
46980605 OD |
11 | /* |
12 | * See <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104831> for details. | |
13 | * | |
14 | * Until the following patches are backported, Userspace RCU is broken for the | |
15 | * RISC-V architecture when compiled with GCC. | |
16 | * | |
17 | * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448> | |
18 | * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=4990cf84c460f064d6281d0813f20b0ef20c7448> | |
19 | * - <https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d199d2e56da2379004e7e0457150409c0c99d3e6> | |
20 | */ | |
21 | #if defined(__GNUC__) | |
22 | # error "Implementations of some atomic operations of GCC for RISC-V \ | |
23 | are insufficient for sequential consistency. For this reason \ | |
24 | Userspace RCU is currently marked as 'broken' for RISC-V with \ | |
25 | GCC. However, it is still possible to use other toolchains." | |
26 | #endif | |
27 | ||
fdfad810 MJ |
28 | #ifndef _URCU_ARCH_UATOMIC_RISCV_H |
29 | #define _URCU_ARCH_UATOMIC_RISCV_H | |
30 | ||
31 | #include <urcu/compiler.h> | |
32 | #include <urcu/system.h> | |
33 | ||
34 | #ifdef __cplusplus | |
35 | extern "C" { | |
36 | #endif | |
37 | ||
38 | #define UATOMIC_HAS_ATOMIC_BYTE | |
39 | #define UATOMIC_HAS_ATOMIC_SHORT | |
40 | ||
41 | #ifdef __cplusplus | |
42 | } | |
43 | #endif | |
44 | ||
45 | #include <urcu/uatomic/generic.h> | |
46 | ||
47 | #endif /* _URCU_ARCH_UATOMIC_RISCV_H */ |